Many electrical and electronic devices, particularly industrial and consumer electronics devices require direct current (DC) power for operation although such power may be ultimately generated and distributed over a power grid as alternating current (AC) power. In many such devices, particularly those including relatively powerful or high performance processors, logic circuits and/or memories, the required DC voltage(s) must be closely regulated. Therefore inclusion of a power converter is a requirement of virtually all such devices although the power converter, itself, does not contribute to the ultimate function of the circuits to which power is supplied. Further, the power converter often represents a significant fraction of the cost of the electronics in such a device and the space and weight thereof may be comparable to the electronics themselves. Accordingly, efficiency of power delivery of the power converter is of paramount importance. The power density and complexity/cost of the power converter is of an importance which often closely approaches that of efficiency in power delivery.
A power converter, especially if it is to be connected to an AC power distribution grid typically has three stages: an electromagnetic interference (EMI) filter stage designed to prevent high frequencies such as switching transients from being transmitted back to the power distribution grid and/or radiated into the environment, a power factor correction (PFC) stage to prevent or minimize effects on the power distribution grid voltage or phase due to changes in load, and a regulator stage to maintain the voltage supplied within a very narrow range notwithstanding potentially large changes in the current supplied. The EMI filter stage does not generally present significant losses and efficiency of switching voltage regulators is relatively high at the present state of the art. On the other hand, depending on the noise magnitude and frequencies present in switching noise that may be generated, the EMI filter stage may be of significant complexity, size and weight and may thus compromise cost and power density of the complete power converter.
However, the PFC stage which generally provides AC to DC conversion and the regulator stage remain a significant contributors to operating losses in power converters. While switching regulator stage design has become highly sophisticated and relatively high efficiency can be achieved over wide load range, the design of PFC stage circuits has also become highly developed but high levels of efficiency have been achieved only for relatively narrow load ranges. The principal difficulty in achieving overall high efficiency arises when the load to which power is to be supplied varies more widely, as is particularly the case for modern semiconductor digital processors, logic circuits and memories which have recently become capable of extremely fast cycle times and high clock frequencies. As is known, an ideal transistor operated in a digital or binary mode, consumes power only during switching transitions and thus higher clock rates imply greater power consumption, even in ideal devices, while state-of-the-art semiconductor devices often operate in modes which are far from ideal and consume significant power in each of the binary states as well as during switching transitions. Further, such devices, upon receiving an input, perform associated processing at very high speed while reverting to a stand-by mode or even a so-called “sleep” mode until further input is received in order to conserve power (e.g. that may be supplied from a battery). Therefore, such devices exhibit a wide range of the load which they may present at any given time.
Thus, the PFC stage of power converters is also required to accommodate such a wide range of load as efficiently as possible. However, in PFC circuits developed to date, while capable of acceptable efficiency at full or near-full load by operating at a high, constant switching frequency using variable pulse width, that efficiency cannot be maintained at medium or light load where switching losses at the constant high frequency become dominant.
It is also known that light load efficiency can be achieved for PFC circuits by varying the switching frequency to reduce switching losses. However, it is increasingly being required that very high efficiency be maintained over the entire potential load range of the circuit(s) to which power is being supplied and it has been found that simply switching from one mode of operation to another mode of operation is inadequate to maintain a sufficiently high efficiency over the entire load range. Further, attempts to achieve some blending of modes of operation that may have been attempted to date have been similarly unsuccessful in achieving significant efficiency improvement while involving greatly increased complexity to the point of compromising power density, cost and weight of the power converter.